997550
9783540200741
This book constitutes the refereed proceedings of the 13th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2003, held in Torino, Italy in September 2003. The 43 revised full papers and 18 revised poster papers presented together with three keynote contributions were carefully reviewed and selected from 85 submissions. The papers are organized in topical sections on gate-level modeling and characterization, interconnect modeling and optimization, asynchronous techniques, RTL power modeling and memory optimization, high-level modeling, power-efficient technologies and designs, communication modeling and design, and low-power issues in processors and multimedia.Chico, Jorge Juan is the author of 'Integrated Circuit and System Design Power and Timing Modeling, Optimization and Simulation 13th International Workshop, Patmos 2002, Torino, Italy, September 10-12, 2003 Proceedings' with ISBN 9783540200741 and ISBN 3540200746.
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